1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, it relates to an improvement for reducing contact resistance between an electrode and a semiconductor substrate.
2. Description of the Background Art
FIG. 42 is a front sectional view showing the structure of a conventional semiconductor device 151 forming the background of the present invention. The conventional semiconductor device 151 comprises a MOSFET (metal oxide semiconductor field-effect transistor) on a major surface of a silicon semiconductor substrate 51. Throughout the specification, an insulated gate FET having a non-metal gate electrode is also referred to as a MOSFET, according to the custom in the related field.
A pair of n-type semiconductor layers 57 are selectively formed in the major surface of the semiconductor substrate 51 exposing a p-type semiconductor layer in a region enclosed with a pair of element isolation layers 52. The surface layer part of the major surface of the semiconductor substrate 51 enclosed with the pair of semiconductor layers 57 corresponds to a channel region CH of the MOSFET. The semiconductor layers 57 correspond to source/drain regions of the MOSFET. An insulator film 53 is formed on the major surface of the semiconductor substrate 51, and a gate electrode 55 is formed on the insulator film 53 to be opposed to the channel region CH. Side surfaces of the gate electrode 55 are covered with insulating side walls 56.
An insulator layer 58 is formed to entirely cover the aforementioned structure formed over the semiconductor substrate 51. In this insulator layer 58, a pair of contact holes 59 are selectively formed on positions located immediately above the pair of semiconductor layers 57, while a contact hole 71 is selectively formed on a position located immediately above the gate electrode 55.
The contact holes 59 are charged with conductive main electrodes 64 through a barrier layer 62. Consequently, the pair of main electrodes 64 are connected to the pair of semiconductor layers 57. Similarly, the contact hole 71 is charged with a conductive gate wire 72 through the barrier layer 62. Consequently, the gate wire 72 is connected to the gate electrode 55.
As understood from FIG. 43 showing a part J of FIG. 42 in an enlarged manner, silicide layers 63 are formed on the interfaces between the barrier layer 62 and the semiconductor layers 57 and that between the barrier layer 62 and the gate electrode 55 respectively. Thus, the semiconductor device 151 has the silicide layers 63 interposed between the main electrodes 64 and the semiconductor layers 57 and between the gate wire 72 and the gate electrode 55, for suppressing contact resistance therebetween.
The contact resistance between each main electrode 64 and each semiconductor layer 57 is given by the total sum of the resistance of the main electrode 64, the interface resistance between the main electrode 64 and the barrier layer 62, the resistance of the barrier layer 62, the interface resistance between the barrier layer 62 and the silicide layer 63, the resistance of the silicide layer 63 and the interface resistance between the silicide layer 63 and the semiconductor layer 57. Among these resistance elements, the interface resistance between the silicide layer 63 and the semiconductor layer 57 is the maximum. Therefore, the interface resistance between the silicide layer 63 and the semiconductor layer 57 dominates the contact resistance between the main electrode 64 and the semiconductor layer 57.
The interface resistance R between the silicide layer 63 and the semiconductor layer 57 is expressed as follows:
R=xcfx81/SAxe2x80x83xe2x80x83(1) 
where xcfx81 represents the interface resistivity between the silicide layer 63 and the semiconductor layer 57 and SA represents the contact area on the interface between the silicide layer 63 and the semiconductor layer 57.
Following recent refinement of the semiconductor device, the diameter of the contact hole 59 tends to be reduced. Consequently, the contact area SA is reduced, to increase while the interface resistance R. Since the diameter of the contact hole 71 also tends to be reduced, the contact resistance between the gate wire 72 and the gate electrode 55 is also increased similarly to that between the main electrode 64 and the semiconductor layer 57. However, the increase of the contact resistance between the main electrode 64 feeding a main current and the semiconductor layer 57 is more significant.
In order to reduce the interface resistance R, two countermeasures for reducing the interface resistivity xcfx81 and enlarging the contact area SA are assumable from the expression (1). Prior Art noting each of these countermeasures is known in the art.
Each of Japanese Patent Laying-Open Gazettes Nos. 8-191053 (1996) and 9-115860 (1997) discloses a technique employing silicide epitaxially growing toward a silicon substrate. On a general interface between silicide and silicon, a number of defects are present due to mismatching in crystal structure. Consequently, the defects cause scattering when carriers pass through the interface, to increase the interface resistivity xcfx81.
On the other hand, the interface resistivity xcfx81 is reduced on the interface between silicide epitaxially growing on a silicon substrate and silicon, due to a small amount of crystal defects. In other words, the prior art disclosed in each of the aforementioned gazettes achieves reduction of the interface resistivity xcfx81. In the prior art, however, the contact area SA cannot be enlarged.
Japanese Patent Laying-Open Gazette No. 3-280532 (1991) discloses a technique of reducing the contact resistance between an electrode and a semiconductor substrate by forming fine irregularities on the bottom portion of a contact hole. According to this technique, the contact area SA can be enlarged without increasing the diameter of the contact hole. However, the interface resistivity xcfx81 cannot be reduced.
While either the interface resistivity xcfx81 or the contact area SA can be improved in the prior art as described above, no technique of effectively reducing the contact resistance between an electrode and a semiconductor substrate by improving both these elements has been known in the art.
According to a first aspect of the present invention, a semiconductor device comprises a semiconductor substrate having a major surface, an electrode formed on the semiconductor substrate, and a metal semiconductor compound layer interposed between the electrode and the semiconductor substrate and provided with an epitaxial growth layer at least partially inclined against the major surface.
In the semiconductor device according to the first aspect of the present invention, the metal semiconductor compound layer interposed between the electrode and the semiconductor substrate has the epitaxial growth layer at least partially inclined against the major surface of the semiconductor substrate, whereby the area of the interface between the epitaxial growth layer and the semiconductor substrate is enlarged and the interface resistivity is reduced. Therefore, the contact resistance between the electrode and the semiconductor substrate is effectively reduced.
According to a second aspect of the present invention, the semiconductor substrate comprises a semiconductor layer selectively formed in the major surface and containing an impurity, the semiconductor device further comprises an insulator layer formed on the major surface, the insulator layer defines a contact hole selectively opening on the semiconductor layer, the electrode is embedded in the contact hole and connected to the semiconductor layer, a main part of the metal semiconductor compound layer is formed only in a region of the major surface located immediately under the contact hole, and the semiconductor substrate further comprises another semiconductor layer identical in conductivity type to the semiconductor layer, deeper than the semiconductor layer and selectively formed in the major surface to cover the region of the major surface located immediately under the contact hole.
In the semiconductor device according to the second aspect of the present invention, at least the main part of the metal semiconductor compound layer is formed only in the region located immediately under the contact hole, whereby the metal semiconductor compound layer can be formed through a simple step of forming a metal film on the bottom portion of the contact hole and performing a heat treatment. Further, the semiconductor device comprises another semiconductor layer, whereby sufficient distances can be ensured between the epitaxial growth layer and edge portions of the semiconductor layers even if the semiconductor layer is shallowly formed. Therefore, refinement of the semiconductor device can be attained while suppressing a leakage current.
According to a third aspect of the present invention, the semiconductor substrate comprises a semiconductor layer selectively formed in the major surface and containing an impurity, the semiconductor device further comprises an insulator layer formed on the major surface, the insulator layer defines a contact hole selectively opening on the semiconductor layer, the electrode is embedded in the contact hole and connected to the semiconductor layer, a main part of the metal semiconductor compound layer is formed only in a region of the major surface located immediately under the contact hole, the semiconductor substrate further comprises an element isolation layer selectively formed in the major surface, the semiconductor layer extends up to an edge of the element isolation layer, and the contact hole is formed on a portion apart from immediately above the element isolation layer.
In the semiconductor device according to the third aspect of the present invention, at least the main part of the metal semiconductor compound layer is formed only in the region located immediately under the contact hole, whereby the metal semiconductor compound layer can be formed through a simple step of forming a metal film on the bottom portion of the contact hole and performing a heat treatment. Further, the contact hole is formed on the portion apart from immediately above the element isolation layer, whereby the epitaxial growth layer can be prevented from being formed as an abnormally growing layer due to influence by residual stress derived from the element isolation layer. Consequently, increase in a leakage current can be prevented.
According to a fourth aspect of the present invention, the semiconductor substrate comprises a semiconductor layer selectively formed in the major surface and containing an impurity, the semiconductor device further comprises an insulator layer formed on the major surface, the insulator layer defines a contact hole selectively opening on the semiconductor layer, the electrode is embedded in the contact hole and connected to the semiconductor layer, and the metal semiconductor compound layer is formed in a region of the major surface occupied by the semiconductor layer, including a region located immediately under the contact hole, and a main part thereof juts out from the region located immediately under the contact hole.
In the semiconductor device according to the fourth aspect of the present invention, the main part of the metal semiconductor compound layer is formed in the region occupied by the semiconductor layer while jutting out from the region located immediately under the contact hole, whereby the contact area on the interface between the metal semiconductor compound layer and the semiconductor layer is further enlarged. Therefore, the contact resistance between the electrode and the semiconductor substrate can be further reduced while keeping the diameter of the contact hole small.
According to a fifth aspect of the present invention, a method of manufacturing a semiconductor device comprises (a) a step of preparing a semiconductor substrate having a major surface, (b) a step of forming a metal film on a part of the major surface, (c) a step of forming a metal semiconductor compound layer on the part by performing a first heat treatment, (d) a step of epitaxially growing at least a part of the metal semiconductor compound layer into the semiconductor substrate in a direction inclined against the major surface by performing a second heat treatment, and (e) a step of connecting an electrode to the part of the major surface after the step (b).
In the method according to the fifth aspect of the present invention, the metal semiconductor compound layer is formed between the electrode and the semiconductor substrate and an epitaxial growth layer is so formed that at least a part thereof is inclined against the major surface of the semiconductor substrate, whereby the area of the interface between the epitaxial growth layer and the semiconductor substrate is enlarged and the interface resistivity is reduced. Consequently, a semiconductor device effectively reducing the contact resistance between the electrode and the semiconductor substrate is implemented.
According to a sixth aspect of the present invention, the step (a) includes (a-1) a step of preparing a semiconductor substrate mainly composed of silicon as the semiconductor substrate, and the step (d) includes (d-1) a step of performing heating at a temperature of at least 600xc2x0 C. and not more than 850xc2x0 C. for at least 30 minutes as the second heat treatment.
According to a seventh aspect of the present invention, the method of manufacturing a semiconductor device further comprises (e0) a step of performing heating at a temperature not lower than 800xc2x0 C. for not more than 1 minute between the steps (c) and (d).
According to an eighth aspect of the present invention, the method of manufacturing a semiconductor device further comprises (f) a step of selectively forming a semiconductor layer in the major surface by selectively introducing an impurity into the major surface before the step (b), (g) a step of forming an insulator layer on the major surface before the step (f) and after the step (b), (h) a step of forming a contact hole selectively opening on the semiconductor layer in the insulator layer before the step (b), and (i) a step of selectively forming another semiconductor layer in the major surface to be identical in conductivity type to the semiconductor layer and deeper than the semiconductor layer by selectively introducing an impurity into the major surface through the contact hole before the step (b), the step (b) includes (b-1) a step of forming the metal film on a surface of the semiconductor layer exposed in the contact hole and on an inner wall surface of the contact hole, and the step (e) includes (e-1) a step of forming the electrode in the contact hole by charging the contact hole with a material for the electrode.
In the method according to the eighth aspect of the present invention, the metal semiconductor compound layer can be formed through a simple step of forming a metal film on the bottom portion of the contact hole and performing a heat treatment. Since another semiconductor layer is formed, further, sufficient distances can be ensured between the epitaxial growth layer and edge portions of the semiconductor layers even if the semiconductor layer is shallowly formed. Therefore, refinement of the semiconductor device can be attained while suppressing a leakage current.
According to a ninth aspect of the present invention, the method of manufacturing a semiconductor device further comprises (f) a step of selectively forming a semiconductor layer in the major surface by selectively introducing an impurity into the major surface before the step (b), (g) a step of forming an insulator layer on the major surface after the step (f) and before the step (b), (h) a step of forming a contact hole selectively opening on the semiconductor layer in the insulator layer before the step (b), and (i) a step of selectively forming an element isolation layer in the major surface before the step (f), the step (b) includes (b-1) a step of forming the metal film on a surface of the semiconductor layer exposed in the contact hole and on an inner wall surface of the contact hole, the step (e) includes (e-1) a step of forming the electrode in the contact hole by charging the contact hole with a material for the electrode, the step (f) includes (f-1) a step of forming the semiconductor layer by selectively introducing the impurity into the major surface while employing the element isolation layer as a screen, and the step (h) includes (h-1) a step of forming the contact hole on a portion apart from immediately above the element isolation layer.
In the method according to the ninth aspect of the present invention, the metal semiconductor compound layer can be formed through a simple step of forming a metal film on the bottom portion of the contact hole and performing a heat treatment. Further, the contact hole is formed on the portion apart from immediately above the element isolation layer, whereby the epitaxial growth layer can be prevented from being formed as an abnormally growing layer due to influence by residual stress derived from the element isolation layer. Consequently, a semiconductor device suppressing a leakage current is obtained.
According to a tenth aspect of the present invention, the method of manufacturing a semiconductor device further comprises (f) a step of forming a screen selectively defining an opening in a region of the major surface corresponding to the part on the major surface before the step (b), and (g) a step of selectively forming a semiconductor layer in the major surface by selectively introducing an impurity into the major surface through the opening before the step (b).
In the method according to the tenth aspect of the present invention, the metal semiconductor compound layer is formed on a surface of the semiconductor layer corresponding to the opening for selectively introducing the impurity contained by the semiconductor layer. Consequently, a semiconductor device having a wide contact area on the interface between the metal semiconductor compound layer and the semiconductor layer thereby further effectively reducing the contact resistance between the electrode and the semiconductor substrate is implemented.
According to an eleventh aspect of the present invention, the step (e) is carried out after the step (c), and the method further comprises (k) a step of removing an unreacted part of the metal film after the step (c) and before the step (e).
In the method according to the eleventh aspect of the present invention, the unreacted part of the metal film is removed after the metal semiconductor compound layer is formed and before the electrode is connected to the major surface of the semiconductor substrate. Consequently, the electrode can be readily formed while ensuring a sufficient thickness of the metal semiconductor layer even if the contact hole for forming the electrode is limited in diameter. In other words, refinement of the semiconductor device is further facilitated.
An object of the present invention is to provide a semiconductor device simultaneously implementing reduction of interface resistivity between a metal semiconductor compound layer and a semiconductor substrate and enlargement of a contact area thereby effectively reducing contact resistance between an electrode and the semiconductor substrate and a method of manufacturing the same.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.